mirror of
https://github.com/AlexandreRouma/SDRPlusPlus.git
synced 2026-04-20 23:22:43 +00:00
Added basic RDS support, no error correction yet
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189
core/src/dsp/clock_recovery/fd.h
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189
core/src/dsp/clock_recovery/fd.h
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#pragma once
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#include "../processor.h"
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#include "../loop/phase_control_loop.h"
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#include "../taps/windowed_sinc.h"
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#include "../multirate/polyphase_bank.h"
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#include "../math/step.h"
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namespace dsp::clock_recovery {
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class FD : public Processor<float, float> {
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using base_type = Processor<float, float> ;
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public:
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FD() {}
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FD(stream<float>* in, double omega, double omegaGain, double muGain, double omegaRelLimit, int interpPhaseCount = 128, int interpTapCount = 8) { init(in, omega, omegaGain, muGain, omegaRelLimit, interpPhaseCount, interpTapCount); }
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~FD() {
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if (!base_type::_block_init) { return; }
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base_type::stop();
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dsp::multirate::freePolyphaseBank(interpBank);
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buffer::free(buffer);
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}
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void init(stream<float>* in, double omega, double omegaGain, double muGain, double omegaRelLimit, int interpPhaseCount = 128, int interpTapCount = 8) {
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_omega = omega;
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_omegaGain = omegaGain;
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_muGain = muGain;
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_omegaRelLimit = omegaRelLimit;
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_interpPhaseCount = interpPhaseCount;
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_interpTapCount = interpTapCount;
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pcl.init(_muGain, _omegaGain, 0.0, 0.0, 1.0, _omega, _omega * (1.0 - omegaRelLimit), _omega * (1.0 + omegaRelLimit));
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generateInterpTaps();
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buffer = buffer::alloc<float>(STREAM_BUFFER_SIZE + _interpTapCount);
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bufStart = &buffer[_interpTapCount - 1];
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base_type::init(in);
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}
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void setOmega(double omega) {
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assert(base_type::_block_init);
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std::lock_guard<std::recursive_mutex> lck(base_type::ctrlMtx);
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base_type::tempStop();
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_omega = omega;
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offset = 0;
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pcl.phase = 0.0f;
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pcl.freq = _omega;
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pcl.setFreqLimits(_omega * (1.0 - _omegaRelLimit), _omega * (1.0 + _omegaRelLimit));
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base_type::tempStart();
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}
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void setOmegaGain(double omegaGain) {
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assert(base_type::_block_init);
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std::lock_guard<std::recursive_mutex> lck(base_type::ctrlMtx);
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_omegaGain = omegaGain;
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pcl.setCoefficients(_muGain, _omegaGain);
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}
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void setMuGain(double muGain) {
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assert(base_type::_block_init);
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std::lock_guard<std::recursive_mutex> lck(base_type::ctrlMtx);
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_muGain = muGain;
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pcl.setCoefficients(_muGain, _omegaGain);
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}
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void setOmegaRelLimit(double omegaRelLimit) {
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assert(base_type::_block_init);
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std::lock_guard<std::recursive_mutex> lck(base_type::ctrlMtx);
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_omegaRelLimit = omegaRelLimit;
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pcl.setFreqLimits(_omega * (1.0 - _omegaRelLimit), _omega * (1.0 + _omegaRelLimit));
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}
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void setInterpParams(int interpPhaseCount, int interpTapCount) {
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assert(base_type::_block_init);
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std::lock_guard<std::recursive_mutex> lck(base_type::ctrlMtx);
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base_type::tempStop();
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_interpPhaseCount = interpPhaseCount;
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_interpTapCount = interpTapCount;
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dsp::multirate::freePolyphaseBank(interpBank);
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buffer::free(buffer);
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generateInterpTaps();
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buffer = buffer::alloc<float>(STREAM_BUFFER_SIZE + _interpTapCount);
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bufStart = &buffer[_interpTapCount - 1];
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base_type::tempStart();
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}
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void reset() {
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assert(base_type::_block_init);
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std::lock_guard<std::recursive_mutex> lck(base_type::ctrlMtx);
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base_type::tempStop();
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offset = 0;
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pcl.phase = 0.0f;
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pcl.freq = _omega;
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base_type::tempStart();
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}
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inline int process(int count, const float* in, float* out) {
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// Copy data to work buffer
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memcpy(bufStart, in, count * sizeof(float));
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// Process all samples
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int outCount = 0;
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while (offset < count) {
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float error;
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float outVal;
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float dfdt;
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// Calculate new output value
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int phase = std::clamp<int>(floorf(pcl.phase * (float)_interpPhaseCount), 0, _interpPhaseCount - 1);
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volk_32f_x2_dot_prod_32f(&outVal, &buffer[offset], interpBank.phases[phase], _interpTapCount);
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out[outCount++] = outVal;
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// Calculate derivative of the signal
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if (phase == 0) {
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float fT1;
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volk_32f_x2_dot_prod_32f(&fT1, &buffer[offset], interpBank.phases[phase+1], _interpTapCount);
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dfdt = fT1 - outVal;
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}
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else if (phase == _interpPhaseCount - 1) {
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float fT_1;
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volk_32f_x2_dot_prod_32f(&fT_1, &buffer[offset], interpBank.phases[phase-1], _interpTapCount);
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dfdt = outVal - fT_1;
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}
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else {
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float fT_1;
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float fT1;
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volk_32f_x2_dot_prod_32f(&fT_1, &buffer[offset], interpBank.phases[phase-1], _interpTapCount);
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volk_32f_x2_dot_prod_32f(&fT1, &buffer[offset], interpBank.phases[phase+1], _interpTapCount);
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dfdt = (fT1 - fT_1) * 0.5f;
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}
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// Calculate error
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error = dfdt * math::step(outVal);
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// Clamp symbol phase error
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if (error > 1.0f) { error = 1.0f; }
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if (error < -1.0f) { error = -1.0f; }
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// Advance symbol offset and phase
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pcl.advance(error);
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float delta = floorf(pcl.phase);
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offset += delta;
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pcl.phase -= delta;
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}
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offset -= count;
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// Update delay buffer
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memmove(buffer, &buffer[count], (_interpTapCount - 1) * sizeof(float));
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return outCount;
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}
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int run() {
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int count = base_type::_in->read();
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if (count < 0) { return -1; }
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int outCount = process(count, base_type::_in->readBuf, base_type::out.writeBuf);
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// Swap if some data was generated
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base_type::_in->flush();
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if (outCount) {
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if (!base_type::out.swap(outCount)) { return -1; }
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}
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return outCount;
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}
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loop::PhaseControlLoop<float, false> pcl;
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protected:
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void generateInterpTaps() {
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double bw = 0.5 / (double)_interpPhaseCount;
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dsp::tap<float> lp = dsp::taps::windowedSinc<float>(_interpPhaseCount * _interpTapCount, dsp::math::freqToOmega(bw, 1.0), dsp::window::nuttall, _interpPhaseCount);
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interpBank = dsp::multirate::buildPolyphaseBank<float>(_interpPhaseCount, lp);
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taps::free(lp);
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}
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dsp::multirate::PolyphaseBank<float> interpBank;
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double _omega;
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double _omegaGain;
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double _muGain;
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double _omegaRelLimit;
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int _interpPhaseCount;
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int _interpTapCount;
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int offset = 0;
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float* buffer;
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float* bufStart;
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};
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}
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@@ -178,7 +178,7 @@ namespace dsp::clock_recovery {
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}
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dsp::multirate::PolyphaseBank<float> interpBank;
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loop::PhaseControlLoop<double, false> pcl;
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loop::PhaseControlLoop<float, false> pcl;
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double _omega;
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double _omegaGain;
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